| Update HistoryV2.6.5 / 10-February-2020Main 
Changes
 All header filesUpdate to use new BSD License format
 MDK-ARM startup filesUpdate to fix invalid config wizard annotations
 V2.6.4 / 06-December-2019Main 
Changes
 stm32f446xx.h fileUpdate to support HW flow control on UART4 and UART5 instances
 stm32f412xx.h, stm32f413xx.h and stm32f423xx.h filesRemove unused IS_USB_ALL_INSTANCE() assert macro
 All header filesRemove unused IS_TIM_SYNCHRO_INSTANCE() assert macro
 system_stm32f4xx.c fileUpdate SystemInit() API to don't reset RCC registers to its reset values
 V2.6.3 / 08-February-2019Main 
Changes
 
CRYP:
                Update CMSIS devices with correct CRYP data input register name: DIN instead of DRAdd Bits definition for CRYP CR ALGOMODE AES GCM/CCM HASH:
Update HASH_DIGEST_TypeDef structure: resize the HR register
Remove MDMAT Bits definition TIM:
Add requires TIM assert macros:
                  IS_TIM_SYNCHRO_INSTANCE()IS_TIM_CLOCKSOURCE_TIX_INSTANCE()IS_TIM_CLOCKSOURCE_ITRX_INSTANCE() RCC
                Add RCC_CSR_BORRSTF bits definition GPIO
                Fix GPIO BRR bits definitionAdjust the GPIO present on STM32F412 devices
 SAI
                Fix frame length in SAI_xFRCR_FSALL & SAI_xFRCR_FRL bits description 
 USB:
                Add missing Bits Definitions in USB_OTG_DOEPMSK register 
                
                  USB_OTG_DOEPMSK_AHBERRMUSB_OTG_DOEPMSK_OTEPSPRMUSB_OTG_DOEPMSK_BERRMUSB_OTG_DOEPMSK_NAKMUSB_OTG_DOEPMSK_NYETM 
                Add missing Bits Definitions in USB_OTG_DIEPINT register 
                
USB_OTG_DIEPINT_INEPNMUSB_OTG_DIEPINT_AHBERRUSB_OTG_DOEPINT_OUTPKTERR USB_OTG_DOEPINT_NAKUSB_OTG_DOEPINT_STPKTRX Add missing Bits Definitions in USB_OTG_DCFG register
USB_OTG_DCFG_XCVRDLYUSB_OTG_DCFG_ERRATIM 
                Update USB OTG max number of endpoints (6 FS and 9 HS instead of 5 and 8) I2C/FMPI2C
                Align Bit naming for FMPI2C_CR1 register: FMPI2C_CR1_DFN--> FMPI2C_CR1_DNFAdd IS_SMBUS_ALL_INSTANCE() define DFSDM
Align Bit naming for DFSDM_FLTICR register: DFSDM_FLTICR_CLRSCSDF--> DFSDM_FLTICR_CLRSCDF PWR
Remove PWR_CSR_WUPP define: feature not available on STM32F469xx/479xx devices V2.6.2 / 06-October-2017Main 
Changes
 Remove Date and Version from all header filesUSB_OTG register clean up: remove duplicated bits definitionsstm32f401xc.h, stm32f401xe.h, stm32f411xe.h filesRemove BKPSRAM_BASE define: feature not available
 stm32f405xx.h, stm32f407xx.h filesRename HASH_RNG_IRQn to RNG_IRQn: HASH instance not available 
 stm32f410xx.h, stm32f412xx.h, stm32f413xx.h,  stm32f423xx.h filesAdd missing wake-up pins defines
 stm32f412cx.h files Add support of USART3 instance
 V2.6.1 / 14-February-2017Main 
Changes
 General updates in header files to support LL driversAlign Bit naming for RCC_CSR register (ex: RCC_CSR_PADRSTF --> RCC_CSR_PINRSTF)Add new defines for RCC features support:RCC PLLI2S and RCC PLLSAI supportRCC PLLR I2S clock source and RCC PLLR system clock supportRCC SAI1A PLL source and RCC SAI1B PLL source supportRCC AHB2 support
 Add RCC_DCKCFGR_PLLI2SDIVQ_X and  RCC_DCKCFGR_PLLSAIDIVQ_X bits definitionAdd new defines for RCC_PLLI2SCFGR_RST_VALUE, RCC_PLLSAICFGR_RST_VALUE and RCC_PLLCFGR_RST_VALUEAdd new defines for RTC features support:RTC Tamper 2 supportRTC AF2 mapping support
 Align Bit naming for RTC_CR and RTC_TAFCR registers (ex: RTC_CR_BCK --> RTC_CR_BKP)Add new define to manage RTC backup register number: RTC_BKP_NUMBERRename IS_UART_INSTANCE() macro to IS_UART_HALFDUPLEX_INSTANCE()Add new defines to check LIN instance: IS_UART_LIN_INSTANCERemove USART6 instance from STM32F410Tx header fileRename IS_I2S_ALL_INSTANCE_EXT() macro to IS_I2S_EXT_ALL_INSTANCEE()Add IS_I2S_APB1_INSTANCE() macro to check if I2S instance mapping: API1 or APB2
Remove SPI_I2S_SUPPORT define for SPI I2S features support: I2S feature is available on all STM32F4xx devicesAdd SPI_I2S_FULLDUPLEX_SUPPORT define for STM32F413xx/423xx devicesAlign SPI_I2SCFGR bit naming: SPI_I2SCFGR_ASTRTEN bit is missing for STM32F412xx devicesAdd new I2S_APB1_APB2_FEATURE define for STM32F4xx devices where I2S IP's are splited between RCC APB1 and APB2 interfaces
Add new FLASH_SR_RDERR define in FLASH_SR registerAdd FLASH_OTP_BASE and  FLASH_OTP_END defnes to manage FLASH OPT area
Add bit definitions for ETH_MACDBGR registerAdd new defines ADC1_COMMON_BASE and ADC123_COMMON_BASE to replace ADC_BASE defineAdd new defines ADC1_COMMON and ADC123_COMMON to replace ADC defineAdd new ADC macros: IS_ADC_COMMON_INSTANCE() and IS_ADC_MULTIMODE_MASTER_INSTANCE()
Add new defines for ADC multi mode features supportAdd new ADC aliases ADC_CDR_RDATA_MST and ADC_CDR_RDATA_SLV for compatibilities with all STM32 FamiliesUpdate TIM CNT and ARR register mask on 32-bitsAdd new TIM_OR_TI1_RMP define in TIM_OR registerAdd new TIM macros to check TIM feature instance support:IS_TIM_COUNTER_MODE_SELECT_INSTANCE()IS_TIM_CLOCK_DIVISION_INSTANCE()IS_TIM_COMMUTATION_EVENT_INSTANCE()IS_TIM_OCXREF_CLEAR_INSTANCE()IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE()IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE()IS_TIM_REPETITION_COUNTER_INSTANCE()IS_TIM_ENCODER_INTERFACE_INSTANCE()IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE()IS_TIM_BREAK_INSTANCE()
 CAN_IER register clean up: remove duplicated bit definitionsUSB_OTG register: fix the wrong defined values for USB_OTG_GAHBCFG bits 
 V2.6.0 / 04-November-2016Main 
Changes
 Add support of STM32F413xx and STM32F423xx devices Add "stm32f413xx.h" and "stm32f423xx.h" files
 All header filesUse _Pos and _Mask macro for all Bit DefinitionsUpdate LPTIM_OR Bit DefinitionUpdate the defined frequencies by scale for USB exported constantsAdd UID_BASE, FLASHSIZE_BASE and PACKAGE_BASE definesAdd new define DAC_CHANNEL2_SUPPORT to manage DAC channel2 supportUse new DAC1 namingRename PWR_CSR_UDSWRDY define to PWR_CSR_UDRDY in PWR_CSR registerAlign Bit naming for EXTI_IMR and EXTI_EMR registers (ex: EXTI_IMR_MR0 --> EXTI_IMR_IM0)
Add new EXTI_IMR_IM define in EXTI_IMR registerAdd missing DMA registers definitionAdd macro to check SMBUS instance support
 stm32f412cx.h, stm32f412zx.h, stm32f412vx.h, stm32f412rx.h files Add missing SYSCFG register: CFGR2
 stm32f405xx.h, stm32f407xx.h, stm32f427xx.h, stm32f429xx.h filesRemove HASH_RNG_IRQn in IRQn_Type enumeration
 stm32f405xx.h, stm32f407xx.h, stm32f415xx.h, stm32f417xx.h filesRemove I2C FLTR register as not supported
 stm32f407xx.h, stm32f417xx.h, stm32f427xx.h, stm32f429xx.h, stm32f437xx.h, stm32f439xx.h, stm32f469xx.h, stm32f479xx.h filesAdd missing Bit Definition of ETH_MACDBGR register
 system_stm32f4xx.c fileAdd APBPrescTable declaration
 V2.5.1 / 28-June-2016Main 
Changes
 stm32f412rx.h, stm32f412vx.h and stm32f412zx.h files:
 V2.5.0 / 22-April-2016Main 
Changes
 Add support of STM32F412Cx, STM32F412Rx, STM32F412Vx and STM32F412Zx devicesAdd "stm32f412Cx.h", "stm32f412Rx.h", "stm32f412Vx.h" and "stm32f412Zx.h" filesAdd startup files  "startup_stm32f412cx.s", "startup_stm32f412rx.s", "startup_stm32f412vx.s" and "startup_stm32f412zx.s" for EWARM, MDK-ARM and SW4STM32 toolchainsAdd Linker files "stm32f412cx_flash.icf", "stm32f412cx_sram.icf", "stm32f412rx_flash.icf", "stm32f412rx_sram.icf", "stm32f412vx_flash.icf", "stm32f412vx_sram.icf", "stm32f412zx_flash.icf" and "stm32f412zx_sram.icf" used within EWARM Workspaces
 Header files for all STM32 devicesRemove uint32_t cast and keep only Misra Cast (U) to avoid two types cast duplicationCorrect some bits definition to be in line with naming used in the Reference ManualWWDG_CR_Tx changed to WWDG_CR_T_xWWDG_CFR_Wx changed to WWDG_CFR_W_xWWDG_CFR_WDGTBx changed to WWDG_CFR_WDGTB_x
 stm32f407xx.h, stm32f417xx.h, stm32f427xx.h, stm32f429xx.h, stm32f437xx.h, stm32f439xx.h, stm32f446xx.h, stm32f469xx.h, stm32f479xx.h filesCorrect some bits definition to be in line with naming used in the Reference Manual
 DCMI_RISR_x changed to DCMI_RIS_xDCMI_RISR_OVF_RIS changed to DCMI_RIS_OVR_RISDCMI_IER_OVF_IE changed to DCMI_IER_OVR_IE
 stm32f427xx.h, stm32f429xx.h, stm32f437xx.h, stm32f439xx.h, stm32f469xx.h, stm32f479xx.h, stm32f446xx.h filesCorrect some bits definition to be in line with naming used in the Reference ManualSAI_xFRCR_FSPO changed to SAI_xFRCR_FSPOL
 Rename IS_SAI_BLOCK_PERIPH to IS_SAI_ALL_INSTANCE
 stm32f410cx.h, stm32f410rx.h, stm32f410tx.h files and stm32f446xx.hRemove FMPI2C_CR1_SWRST and FMPI2C_CR1_WUPEN Bit definition for I2C_CR1 register
 stm32f407xx.h, stm32f417xx.h, stm32f427xx.h, stm32f437xx.h, stm32f439xx.h, stm32f469xx.h, stm32f479xx.h filesAdd missing bits definitions for DMA2D_CR, DMA2D_FGPFCCR, DMA2D_BGPFCCR, DMA2D_OPFCCR registers
 stm32f401xc.h, stm32f401xe.h, stm32f411xe.h filesAdd missing RCC_DCKCFGR register in RCC_TypeDef structure
Add missing Bit definition for RCC_DCKCFGR register
 system_stm32f4xx.c
Update SystemInit_ExtMemCtl() API to fix delay optimization problem with GCC compiler: index variable is declared as volatile 
 stm32f4xx.hRename __STM32F4xx_CMSIS_DEVICE_VERSION_xx defines to __STM32F4_CMSIS_VERSION_xx (MISRA-C 2004 rule 5.1)
 V2.4.3 / 29-January-2016Main 
Changes
 
 V2.4.2 / 13-November-2015Main 
Changes 
                system_stm32f4xx.c file
                update
SystemInit_ExtMemCtl() function implementation to allow the possibility
of simultaneous use of DATA_IN_ExtSRAM and DATA_IN_ExtSDRAM
 stm32f4xx.h fileadd symbols for STM32F411xC devices
 stm32f405xx.h, stm32f407xx.h, stm32f415xx.h, stm32f417xx.h filesadd FSMC_BCRx_CPSIZE bits definitionsremove FSMC_BWTRx_CLKDIV and FSMC_BWTRx_DATLAT bits definitions
 stm32f429xx.h, stm32f427xx.h, stm32f437xx.h filesadd FMC_BCRx_CPSIZE bits definitionsremove FMC_BWTRx_CLKDIV and FMC_BWTRx_DATLAT bits definitions
 stm32f446xx.h, stm32f469xx.h and stm32f479xx.hupdate USB_OTG_GlobalTypeDef registers structure to remove ADP control registersadd USB_OTG_DOEPMSK_OTEPSPRM and USB_OTG_DOEPINT_OTEPSPR bits definitionsRemove ADP related bits definitionsadd IS_PCD_ALL_INSTANCE() and IS_HCD_ALL_INSTANCE() macros
 V2.4.1 / 
09-October-2015Main 
Changes "stm32f469xx.h", 
"stm32f479xx.h"
Update 
bits definition for DSI_WPCR and DSI_TCCR registers
 V2.4.0 / 14-August-2015Main 
Changes V2.3.2 / 26-June-2015Main 
Changes "stm32f405xx.h", "stm32f407xx.h", "stm32f415xx.h" and "stm32f417xx.h"Update FSMC_BTRx_DATAST and FSMC_BWTRx_DATAST (where x can be 1, 2, 3 and 4) mask on 8bits instead of 4bits
"stm32f427xx.h", "stm32f437xx.h", "stm32f429xx.h" and "stm32f439xx.h"
 Update the defined mask value for SAI_xSR_FLVL_2 
"stm32f415xx.h", "stm32f417xx.h", "stm32f437xx.h" and "stm32f439xx.h"HASH alignement with bits namming used in documentationRename HASH_IMR_DINIM to HASH_IMR_DINIE
 Rename HASH_IMR_DCIM to HASH_IMR_DCIE
 Rename HASH_STR_NBW to HASH_STR_NBW
 system_stm32f4xx.cRemove __IO on constant table declaration
 Implement workaround to cover RCC limitation regarding peripheral enable delay
 SystemInit_ExtMemCtl() update GPIO configuration when external SDRAM is used 
 V2.3.1 / 03-April-2015Main 
ChangesV2.3.0 / 02-March-2015Main 
Changes V2.2.0 / 
15-December-2014Main 
Changes V2.1.0 / 19-June-2014Main
Changes #define FMC_IRQn              FSMC_IRQn#define FMC_IRQHandler     FSMC_IRQHandler
 #define FSMC_IRQn            FMC_IRQn#define FSMC_IRQHandler   FMC_IRQHandler
 V2.0.0 / 18-February-2014 Main
Changes 
Update
based on STM32Cube specification
This version and later has to be used only with STM32CubeF4 based development V1.3.0 / 08-November-2013Main 
Changes V1.2.1 / 
19-September-2013Main 
Changes V1.2.0 / 
11-September-2013Main 
Changes V1.1.0 / 
11-January-2013Main 
Changes 
Official release for STM32F427x/437x devices.
stm32f4xx.h
 Update product define: replace 
"#define STM32F4XX" by "#define STM32F40XX" for STM32F40x/41x devices
 Add new product define: "#define 
STM32F427X" for STM32F427x/437x devices.
Add new startup files "startup_stm32f427x.s" for all toolchains
rename startup files "startup_stm32f4xx.s" by "startup_stm32f40xx.s" for all toolchains 
system_stm32f4xx.c
Prefetch Buffer enabled
Add reference to STM32F427x/437x 
devices and STM324x7I_EVAL board
SystemInit_ExtMemCtl() 
function
 Add configuration of missing FSMC 
address and data lines 
 Change memory type to SRAM instead 
of PSRAM (PSRAM is available only on STM324xG-EVAL RevA) and update timing 
values
 V1.0.2 / 05-March-2012Main
Changes All source files: license disclaimer text update and add link to the License file on ST Internet.
 V1.0.1 / 28-December-2011Main
Changes All source files: update disclaimer to add reference to the new license agreementstm32f4xx.hCorrect bit definition: RCC_AHB2RSTR_HSAHRST changed to RCC_AHB2RSTR_HASHRST
 V1.0.0 / 30-September-2011Main
Changes First official release for STM32F40x/41x devicesAdd startup file for TASKING toolchainsystem_stm32f4xx.c: driver's comments update
 V1.0.0RC2 / 26-September-2011Main
Changes Official version (V1.0.0) Release Candidate2 for STM32F40x/41x devicesstm32f4xx.hAdd define for Cortex-M4 revision __CM4_REVCorrect RCC_CFGR_PPRE2_DIV16 bit (in RCC_CFGR register) value to 0x0000E000Correct some bits definition to be in line with naming used in the Reference Manual  (RM0090)GPIO_OTYPER_IDR_x changed to GPIO_IDR_IDR_xGPIO_OTYPER_ODR_x changed to GPIO_ODR_ODR_xSYSCFG_PMC_MII_RMII changed to SYSCFG_PMC_MII_RMII_SELRCC_APB2RSTR_SPI1 changed to RCC_APB2RSTR_SPI1RSTDBGMCU_APB1_FZ_DBG_IWDEG_STOP changed to DBGMCU_APB1_FZ_DBG_IWDG_STOPPWR_CR_PMODE changed to PWR_CR_VOSPWR_CSR_REGRDY changed to PWR_CSR_VOSRDYAdd new define RCC_AHB1ENR_CCMDATARAMENAdd new defines SRAM2_BASE, CCMDATARAM_BASE and BKPSRAM_BASE
 GPIO_TypeDef structure: in the comment change AFR[2] address mapping to 0x20-0x24 instead of 0x24-0x28
 system_stm32f4xx.cSystemInit(): add code to enable the FPUSetSysClock(): change PWR_CR_PMODE by PWR_CR_VOSSystemInit_ExtMemCtl(): remove commented values
 startup (for all compilers)Delete code used to enable the FPU (moved to system_stm32f4xx.c file)File’s header updated
 V1.0.0RC1 / 25-August-2011Main
Changes Official version (V1.0.0) Release Candidate1 for STM32F4xx devices
 License
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 from this software without specific prior written permission.Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.Redistributions
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