| Update HistoryV2.2.4/ 09-September-2020Main Changes
 
              All header files: 
                Remove unused IS_TIM_SYNCHRO_INSTANCE() assert macro system_stm32f2xx.h
                 SystemInit(): update to don't reset RCC registers to its reset values. Protect
Vector table modification following SRAM or FLASH preprocessor
directive by a generic preprocessor directive : USER_VECT_TAB_ADDRESS
 V2.2.3 / 31-December-2019Main Changes
 Update Release_Notes.html to refer to"_htmresc/st_logo.png" instead of "../../../../../_htmresc/st_logo.png"
 V2.2.2 / 26-June-2019Main Changes
 
              General updates to fix known defects and enhancements implementation for MISRA 2012 compliancy.
                Update to use "UL" postfix for bits mask definitions(_Msk) and memory/peripheral base addresses 
                HAL_IS_BIT_SET()/HAL_IS_BIT_CLR() macros implementation updateDevices headers clean up:Remove double casting uint32_t and URemove extra parenthesis instead of U
 stm32f2xx.hAlign ErrorStatus typedef to common error handling
 GPIO:
                Add new IS_GPIO_AF_INSTANCE() macro HASHRename HASH_RNG_IRQn to  RNG_IRQn for STM32F205xx and STM32F207xx devices as HASH isn't supported
 CRYP:
Rename CRYP data input register name to be aligned with reference manual Rename DIN field to DR in the CRYP_TypeDef structure
 USB:
Add missing Bits Definitions in USB_OTG_DOEPMSK register 
USB_OTG_DOEPMSK_AHBERRMUSB_OTG_DOEPMSK_OTEPSPRMUSB_OTG_DOEPMSK_BERRMUSB_OTG_DOEPMSK_NAKMUSB_OTG_DOEPMSK_NYETM
 
Add missing Bits Definitions in USB_OTG_DIEPINT register 
USB_OTG_DIEPINT_INEPNMUSB_OTG_DIEPINT_AHBERRUSB_OTG_DOEPINT_OUTPKTERR USB_OTG_DOEPINT_NAKUSB_OTG_DOEPINT_STPKTRX
 Add missing Bits Definitions in USB_OTG_DCFG registerUSB_OTG_DCFG_XCVRDLYUSB_OTG_DCFG_ERRATIM
 TIM:
Add requires TIM assert macros:IS_TIM_SYNCHRO_INSTANCE()IS_TIM_CLOCKSOURCE_TIX_INSTANCE()IS_TIM_CLOCKSOURCE_ITRX_INSTANCE()
 V2.2.1 / 29-September-2017Main Changes
 Header file for all STM32 devicesAdd missing HardFault_IRQn in IRQn_Type enumeration
 "stm32f215xx.h", "stm32f217xx.h"Remove HASH_DIGEST instance
 Remove Date and Version from header files 
 V2.2.0 / 17-March-2017Main Changes
 Use _Pos and _Mask macros for all Bit DefinitionsGeneral updates in header files to support LL driversAlign Bit naming for RCC_CSR register (ex: RCC_CSR_PADRSTF --> RCC_CSR_PINRSTF)Align Bit naming for RTC_CR and RTC_TAFCR registers (ex: RTC_CR_BCK --> RTC_CR_BKP)Rename IS_UART_INSTANCE() macro to IS_UART_HALFDUPLEX_INSTANCE()Add new defines to check LIN instance: IS_UART_LIN_INSTANCEAdd FLASH_OTP_BASE and  FLASH_OTP_END defnes to manage FLASH OPT areaAdd Device electronic signature defines: UID_BASE and FLASHSIZE_BASE defines
Add bit definitions for ETH_MACDBGR registerAdd new define ADC123_COMMON_BASE to replace ADC_BASE defineAdd new define ADC123_COMMON to replace ADC defineAdd new ADC macros: IS_ADC_COMMON_INSTANCE() and IS_ADC_MULTIMODE_MASTER_INSTANCE()
Add new ADC aliases ADC_CDR_RDATA_MST and ADC_CDR_RDATA_SLV for compatibilities with all STM32 FamiliesUpdate TIM CNT and ARR register mask on 32-bitsAdd new TIM_OR_TI1_RMP define in TIM_OR registerAdd new TIM macros to check TIM feature instance support:IS_TIM_COUNTER_MODE_SELECT_INSTANCE()IS_TIM_CLOCK_DIVISION_INSTANCE()IS_TIM_COMMUTATION_EVENT_INSTANCE()IS_TIM_OCXREF_CLEAR_INSTANCE()IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE()IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE()IS_TIM_REPETITION_COUNTER_INSTANCE()IS_TIM_ENCODER_INTERFACE_INSTANCE()IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE()IS_TIM_BREAK_INSTANCE()
 USB_OTG register: fix the wrong defined values for USB_OTG_GAHBCFG bits 
 V2.1.2 / 29-June-2016Main Changes
 Header file for all STM32 devicesRemove uint32_t cast and keep only Misra Cast (U) to avoid two types cast duplicationCorrect some bits definition to be in line with naming used in the Reference ManualWWDG_CR_Tx changed to WWDG_CR_T_xWWDG_CFR_Wx changed to WWDG_CFR_W_xWWDG_CFR_WDGTBx changed to WWDG_CFR_WDGTB_x
 I2C FLTR feature is not supported on F2 family, FLTR bits are removed.Add missing defines for GPIO_AFRL & GPIO_AFRH registersRemove the double definition of USB_OTG_HS_MAX_IN_ENDPOINTS and add a new one for  USB_OTG_HS_MAX_OUT_ENDPOINTSUpdate CMSIS driver to be compliante with MISRA C 2004 rule 10.6
 stm32f207xx.h and stm32f217xx.h filesCorrect some bits definition to be in line with naming used in the Reference Manual
 DCMI_RISR_x changed to DCMI_RIS_xDCMI_RISR_OVF_RIS changed to DCMI_RIS_OVR_RISDCMI_IER_OVF_IE changed to DCMI_IER_OVR_IE
 DCMI_ICR_OVF_ISC changed to DCMI_ICR_OVR_ISCDCMI_MISR changed to DCMI_MIS
 Add missing bit definitions for DCMI_ESCR, DCMI_ESUR, DCMI_CWSTRT, DCMI_CWSIZE, DCMI_DR registers
 stm32f2xx.hRename __STM32F2xx_CMSIS_DEVICE_VERSION_xx defines to __STM32F2_CMSIS_VERSION_xx (MISRA-C 2004 rule 5.1)
 V2.1.1 / 20-November-2015Main Changes
 stm32f205xx.h, stm32f207xx.h, stm32f215xx.h, stm32f217xx.h filesRemove FSMC_BWTRx_CLKDIV and FSMC_BWTRx_DATLAT bits definitions
 V2.1.0 / 09-October-2015Main Changes
 stm32f2xx.hAdd new constant definition STM32F2
 Header file for all STM32F2 devicesGPIO_TypeDef: change the BSRR register
      definition, the two 16-bits definition BSRRH and BSRRL are merged in a
      single 32-bits definition BSRRAdd missing defines for GPIO LCKR RegisterAdd defines for FLASH memory
base and end addresses Update SRAM2 and BKPSRAM Bit-Banding base address defined values
 Update startup files for EWARM toolchain to cope with compiler enhancement of the V7.xx version"stm32f215xx.h", "stm32f217xx.h"HASH alignment with bits naming used in documentationRename HASH_IMR_DINIM to HASH_IMR_DINIE
 Rename HASH_IMR_DCIM to HASH_IMR_DCIE
 Rename HASH_STR_NBW to HASH_STR_NBW
 system_stm32f2xx.c
              Remove dependency vs. the HAL, to allow using this file without the need to have the HAL drivers
 Include stm32f2xx.h instead of stm32f2xx_hal.hAdd
definition of HSE_VALUE and HSI_VALUE, if they are not yet defined in
the compilation scope (these values are defined in stm32f2xx_hal_conf).
 Remove __IO on constant table declarationImplement workaround to cover RCC limitation regarding peripheral enable delaySystemInit_ExtMemCtl() update GPIO configuration when external SRAM is used 
 V2.0.0 / 07-March-2014Main Changes Update based on STM32Cube specification
This version and later has to be used only with STM32CubeF2 based development
 V1.1.3 / 05-March-2012Main Changes All source files: license disclaimer text update and add link to the License file on ST Internet.
 V1.1.2 / 28-December-2011Main Changes All source files: update disclaimer to add reference to the new license agreementstm32f2xx.hCorrect bit definition: RCC_AHB2RSTR_HSAHRST changed to RCC_AHB2RSTR_HASHRST
 V1.1.1 / 14-November-2011Main Changes stm32f2xx.hAdd missing bits definition for DAC CR registerAdd missing bits definition for FSMC BTR1, BTR2, BTR3, BWTR1, BWTR2, BWTR3 and BWTR4 registers
 Add startup file for TASKING toolchain
 V1.1.0 / 23-September-2011Main Changes stm32f2xx.hAdd define for Cortex-M3 revision __CM3_REVAllow
modification of some constants by the application code, definition
of these constants is now bracketed by        
     #if !defined. The concerned constant are HSE_VALUE, HSI_VALUE and HSE_STARTUP_TIMEOUT.Fix include of stm32f2xx_conf.h file, change "stm32f2xx_conf.h " by "stm32f2xx_conf.h"Correct MII_RMII_SEL bit (in SYSCFG_PMC register) value to 0x00800000Correct RCC_CFGR_PPRE2_DIV16 bit (in RCC_CFGR register) value to 0x0000E000Correct some bits definition to be in line with naming used in the Reference Manual (RM0033)GPIO_OTYPER_IDR_x changed to GPIO_IDR_IDR_xGPIO_OTYPER_ODR_x changed to GPIO_ODR_ODR_xSYSCFG_PMC_MII_RMII changed to SYSCFG_PMC_MII_RMII_SELRCC_APB2RSTR_SPI1 changed to RCC_APB2RSTR_SPI1RSTDBGMCU_APB1_FZ_DBG_IWDEG_STOP changed to DBGMCU_APB1_FZ_DBG_IWDG_STOP
 GPIO_TypeDef structure: in the comment change AFR[2] address mapping to 0x20-0x24 instead of 0x24-0x28
 V1.0.0 / 18-April-2011Main Changes First official release for STM32F2xx devices
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